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https://opencores.org/ocsvn/reed_solomon_decoder/reed_solomon_decoder/trunk
Subversion Repositories reed_solomon_decoder
[/] [reed_solomon_decoder/] [trunk/] [simulation/] - Rev 2
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Last modification
- Rev 2 2009-07-06 09:59:18 GMT
- Author: aelmahmoudy
- Log message:
- Initial commit of Reed Solomon Decoder Verilog core (204,188,8)
corrects up to 8 errors per block
Pipelined and verfied on FPGA