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[/] [mod_sim_exp/] [trunk/] - Rev 89

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Last modification

  • Rev 89 2013-04-24 20:19:10 GMT
  • Author: JonasDC
  • Log message:
    updated vhdl files so now different clock frequencies are posible for the core and bus interface.
Path Last modification Log RSS feed
[FOLDER] mod_sim_exp/ 89  4217d 23h JonasDC View Log RSS feed
[NODE][FOLDER] branches/ 68  4267d 06h JonasDC View Log RSS feed
[NODE][FOLDER] tags/ 80  4254d 00h JonasDC View Log RSS feed
[NODE][FOLDER] trunk/ 89  4217d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] bench/ 84  4225d 09h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] doc/ 88  4224d 00h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] rtl/ 89  4217d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sim/ 84  4225d 09h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] sw/ 29  4386d 23h JonasDC View Log RSS feed
[NODE][NODE][FOLDER] syn/ 72  4267d 03h JonasDC View Log RSS feed

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