OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

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Rev Log message Author Age Path
186 root 5510d 21h /
185 root 5566d 22h /
184 initial inport. simont 7632d 03h /
183 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7645d 14h /
182 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7645d 14h /
181 Simulation reports added. simont 7645d 14h /
180 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7645d 15h /
179 add /* synopsys xx_case */ to case statments. simont 7645d 15h /
178 x replaced with 0. simont 7645d 17h /
177 Fix bug in case of writing and reading from same address. simont 7656d 21h /
176 ram modules added. simont 7656d 23h /
175 initial inport. simont 7656d 23h /
174 ram modules added. simont 7656d 23h /
173 simualtion `ifdef added simont 7656d 23h /
172 BIST signals added. simont 7659d 22h /
171 fix bug in DA operation. simont 7667d 19h /
170 removing unused files. simont 7667d 20h /
169 remove unused files. simont 7667d 20h /
168 modify program list. simont 7667d 20h /
167 add readmem for ea. simont 7671d 02h /
166 Change test monitor from ports to external data memory. simont 7671d 19h /
165 remove dumpvars. simont 7671d 23h /
164 initial inport. simont 7672d 00h /
163 initial inport simont 7672d 00h /
162 initial inport. simont 7672d 00h /
161 fix file names. simont 7672d 01h /
160 initial inport. simont 7672d 01h /
159 initial inport. simont 7672d 01h /
158 fix bug. simont 7672d 01h /
157 change data output. simont 7672d 01h /

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