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URL https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk

Subversion Repositories uart_fpga_slow_control_migrated

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Rev Log message Author Age Path
34 ADDED: Philips_PC16550dn_datasheet.pdf aborga 4427d 23h /
33 UPDATE: visio simplified diagram aborga 4567d 16h /
32 ADDED: OpenCores_description_html.txt aborga 4568d 15h /
31 ADDED: html version of the different site section back-upped in txt format aborga 4568d 17h /
30 MODIFIED: cosmetic changes on the SoftwareFolder.txt file aborga 4568d 18h /
29 UPDATED: project documentation for the new software features aborga 4568d 18h /
28 ADDED: software folder with python script (simple but stable) and .bat file to load RealTerm with parameters (extremely unstable) aborga 4568d 19h /
27 MODIFIED: small description improvement aborga 4575d 19h /
26 ADDED: screenshot of the simulation output with tb_uart_control.vhd (project tested with modelsim 6) aborga 4649d 16h /
25 MODIFIED: small comment improvement aborga 4649d 18h /
24 UPDATED: added folder testbenches with a generic tb_UART_control.vhd testbench aborga 4649d 19h /
23 MODIFIED:

renamed lantronix_input and lantronix_output (historical)
to uart_din and uart_dout for consistency

propagated also changes in all comments		 aborga 4649d 20h /
22 aborga 4649d 21h /
21 MODIFIED:

renamed lantronix_input and lantronix_output (historical)
to uart_din and uart_dout for consistency

propagated also changes in all comments		 aborga 4649d 21h /
20 MODIFIED: block diagram with new namings for uart din and dout aborga 4649d 21h /
19 MODIFIED:

renamed lantronix_input and lantronix_output (historical)
to uart_din and uart_dout for consistency

propagated also changes in all comments		 aborga 4649d 21h /
18 MODIFIED: removed unnecessary libraries aborga 4650d 18h /
17 DELETED: useless package folder aborga 4650d 19h /
16 MODIFIED: added

uart_rst_i : in std_logic;
uart_leds_o : out std_logic_vector(7 downto 0);

in the entity declaration		 aborga 4650d 19h /
15 UPDATED: email address aborga 4652d 18h /
14 ADDED: backup of the project description aborga 4653d 10h /
13 UDATED: simple documentation aborga 4653d 12h /
12 ADDED: original documentation of the UART_16550 core by LeFevre aborga 4653d 12h /
11 ADDED: Block diagram of the UART_FPGA_slow_control_main_diagram
1) pdf format
2) Microsoft visio source file (sorry...)		 aborga 4653d 12h /
10 MODIFIED: added further description and examples aborga 4653d 19h /
9 ADDED: HowToSVN.txt to handle repositories with windows Tortoise SVN aborga 4653d 19h /
8 ADDED: some more documentation

1) screenshot of a full read and write sequence with questasim
2) example hex commands to be sent via RealTerm		 aborga 4653d 20h /
7 MODIFIED: line 359 baudrate set aborga 4653d 20h /
6 CREATED: how to change baudrate text file aborga 4653d 20h /
5 aborga 4653d 21h /

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