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[/] [axi4_tlm_bfm/] [trunk/] - Rev 42

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Rev Log message Author Age Path
42 Major enhancements and bugfix. Used DDR for AXI BFM for enhanced functionality and performance. Tested in simulation; TODO update synthesis design files. daniel.kho 3709d 08h /axi4_tlm_bfm/trunk/
41 Updated simulation scripts. daniel.kho 3710d 05h /axi4_tlm_bfm/trunk/
40 Added asynchronous reset in tester logic. daniel.kho 3710d 06h /axi4_tlm_bfm/trunk/
39 Deprecated symbolsPerTransfer and outstandingTransactions; replaced with lastTransaction. Fixed small bug in BFM; tData and tValid should be valid even for the last transaction. daniel.kho 3720d 16h /axi4_tlm_bfm/trunk/
38 Added coverage-driven randomisation to tester. daniel.kho 3720d 16h /axi4_tlm_bfm/trunk/
37 Refactored nReset to reset for real hardware. daniel.kho 3740d 06h /axi4_tlm_bfm/trunk/
36 Added missing pkg-types.vhdl file for simulation. daniel.kho 3767d 05h /axi4_tlm_bfm/trunk/
35 More fixes to Windows script. daniel.kho 3772d 15h /axi4_tlm_bfm/trunk/
34 Added double-quotes for Windows script. daniel.kho 3772d 15h /axi4_tlm_bfm/trunk/
33 Removed semicolons for Windows script. daniel.kho 3772d 15h /axi4_tlm_bfm/trunk/
32 Added compile+simulate script for Windows. daniel.kho 3772d 15h /axi4_tlm_bfm/trunk/
31 Added initial Xilinx Vivado synthesis scripts and constraints. daniel.kho 3786d 13h /axi4_tlm_bfm/trunk/
30 Refactored synthesis scripts. daniel.kho 3786d 13h /axi4_tlm_bfm/trunk/
29 Updated simulation scripts. daniel.kho 3786d 14h /axi4_tlm_bfm/trunk/
28 Temporarily remove simulation folder. daniel.kho 3786d 14h /axi4_tlm_bfm/trunk/
27 Updated simulation scripts. daniel.kho 3786d 14h /axi4_tlm_bfm/trunk/
26 Refactored simulation folders. daniel.kho 3786d 14h /axi4_tlm_bfm/trunk/
25 Refactored folders. daniel.kho 3786d 15h /axi4_tlm_bfm/trunk/
24 Updated simulation sources to reflect changes made for synthesis. daniel.kho 3786d 15h /axi4_tlm_bfm/trunk/
23 Added top-level user example used in technical paper. daniel.kho 3794d 09h /axi4_tlm_bfm/trunk/
22 Added pin assignments for BeMicro kit. Added demo top-level used in technical paper. daniel.kho 3794d 09h /axi4_tlm_bfm/trunk/
21 Added synthesis files for Vivado. The RTL have not yet been updated with the latest changes available in the Quartus version. daniel.kho 3797d 11h /axi4_tlm_bfm/trunk/
20 Updated simulation scripts. daniel.kho 3797d 11h /axi4_tlm_bfm/trunk/
19 Updated synthesis constraints and scripts. daniel.kho 3797d 11h /axi4_tlm_bfm/trunk/
18 Added hardware PRBS generator, modularised top-level by having separate file as the tester. daniel.kho 3797d 11h /axi4_tlm_bfm/trunk/
17 Added more pipelining, enhancements. Tested on BeMicro kit. daniel.kho 3797d 11h /axi4_tlm_bfm/trunk/
16 Moved transaction counter from BFM to user. This gives the user more control over the number of transactions. The BFM now treats this as an input. daniel.kho 3900d 07h /axi4_tlm_bfm/trunk/
15 [minor]: cleaned up sources. daniel.kho 3902d 14h /axi4_tlm_bfm/trunk/
14 Added simple reset logic and verified on hardware. Added PLL to supply test clock to SignalTap. daniel.kho 3911d 04h /axi4_tlm_bfm/trunk/
13 Fixed one-cycle extra read issue, occurring during fast read. Verified on hardware as well. daniel.kho 3911d 09h /axi4_tlm_bfm/trunk/

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