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[/] [dbg_interface/] [tags/] [asyst_2/] - Rev 158

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Rev Log message Author Age Path
158 root 5575d 22h /dbg_interface/tags/asyst_2/
153 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7373d 04h /tags/asyst_2/
152 CTRL READ fixed. Stall bit was not shifted out OK. Error appeared in last
check-in.
igorm 7373d 04h /trunk/
150 Zero is shifted out when CTRL_READ command is active. igorm 7373d 23h /trunk/
147 CPU_WR_CTRL and CPU_RD_CTRL defines changed. igorm 7376d 05h /trunk/
146 Changes for the FormalPRO. igorm 7380d 01h /trunk/
145 Support for 2 CPUs added. igorm 7380d 06h /trunk/
144 Port names and defines for the supported CPUs changed. igorm 7380d 06h /trunk/
143 Signals for easier debugging removed. igorm 7380d 08h /trunk/
142 Typo fixed. igorm 7380d 09h /trunk/
141 data_cnt_lim length changed to reduce number of warnings. igorm 7381d 04h /trunk/
140 CRC checking of incoming CRC added to all tasks. igorm 7381d 19h /trunk/
139 New release of the debug interface (3rd. release). igorm 7383d 22h /trunk/
138 Temp version before changing dbg interface. igorm 7390d 02h /trunk/
136 Table describing chain codes added. igorm 7394d 03h /trunk/
135 'hz changed to 1'hz because Icarus complains. igorm 7397d 02h /trunk/
132 Documentation updated. Many missing things added. igorm 7398d 01h /trunk/
131 Documentation updated. Many missing things added. igorm 7398d 01h /trunk/
129 New documentation. mohor 7440d 00h /trunk/
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.
mohor 7442d 08h /trunk/
126 run_sim.scr renamed to run_sim for VATS. mohor 7445d 08h /trunk/
124 Display for VATS added. mohor 7447d 04h /trunk/
123 All flipflops are reset. mohor 7447d 04h /trunk/
121 Port signals are all set to zero after reset. mohor 7450d 04h /trunk/
120 test stall_test added. mohor 7450d 07h /trunk/
119 cpu_stall_o activated as soon as bp occurs. mohor 7450d 08h /trunk/
117 Define name changed. mohor 7452d 04h /trunk/
116 Data latching changed when testing WB. mohor 7452d 04h /trunk/
115 More debug data added. mohor 7452d 08h /trunk/
114 CRC generation iand verification in bench changed. mohor 7452d 09h /trunk/

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