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[/] [dbg_interface/] [tags/] [highland_ver1/] - Rev 158

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158 root 5564d 18h /dbg_interface/tags/highland_ver1/
133 This commit was manufactured by cvs2svn to create tag 'highland_ver1'. 7386d 21h /tags/highland_ver1/
132 Documentation updated. Many missing things added. igorm 7386d 21h /trunk/
131 Documentation updated. Many missing things added. igorm 7386d 21h /trunk/
129 New documentation. mohor 7428d 20h /trunk/
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.		 mohor 7431d 04h /trunk/
126 run_sim.scr renamed to run_sim for VATS. mohor 7434d 03h /trunk/
124 Display for VATS added. mohor 7436d 00h /trunk/
123 All flipflops are reset. mohor 7436d 00h /trunk/
121 Port signals are all set to zero after reset. mohor 7439d 00h /trunk/
120 test stall_test added. mohor 7439d 03h /trunk/
119 cpu_stall_o activated as soon as bp occurs. mohor 7439d 04h /trunk/
117 Define name changed. mohor 7441d 00h /trunk/
116 Data latching changed when testing WB. mohor 7441d 00h /trunk/
115 More debug data added. mohor 7441d 04h /trunk/
114 CRC generation iand verification in bench changed. mohor 7441d 05h /trunk/
113 IDCODE test improved. mohor 7441d 06h /trunk/
112 dbg_tb_defines.v not used. mohor 7442d 01h /trunk/
111 Define tap_defines.v added to test bench. mohor 7442d 01h /trunk/
110 Waiting for "ready" improved. mohor 7442d 02h /trunk/
108 Reset values width added because of FV, a good sentence changed because some tools can not handle it. simons 7442d 07h /trunk/
106 Sensitivity list updated. simons 7443d 05h /trunk/
104 cpu_tall_o is set with cpu_stb_o or register. mohor 7443d 20h /trunk/
102 New version. mohor 7443d 20h /trunk/
101 Almost finished. mohor 7443d 21h /trunk/
100 *** empty log message *** mohor 7444d 23h /trunk/
99 cpu registers added. mohor 7444d 23h /trunk/
97 Working. mohor 7446d 02h /trunk/
96 Working. mohor 7446d 04h /trunk/
95 Temp version. mohor 7446d 15h /trunk/

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