OpenCores
URL https://opencores.org/ocsvn/minimips_superscalar/minimips_superscalar/trunk

Subversion Repositories minimips_superscalar

[/] [minimips_superscalar/] - Rev 40

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
40 Updating f8o.lst (FFT 8 samples) mcafruni 1419d 15h /minimips_superscalar/
39 mcafruni 1419d 15h /minimips_superscalar/
38 mcafruni 1419d 15h /minimips_superscalar/
37 pc update. mcafruni 1513d 17h /minimips_superscalar/
36 update pc mcafruni 1513d 17h /minimips_superscalar/
35 New delay_gate.vhd mcafruni 1516d 12h /minimips_superscalar/
34 Delete delay_gate to upload a new one. mcafruni 1516d 12h /minimips_superscalar/
33 New syscop.vhd mcafruni 1516d 12h /minimips_superscalar/
32 Delete syscop to upload a new one. mcafruni 1516d 12h /minimips_superscalar/
31 New top module. mcafruni 1516d 12h /minimips_superscalar/
30 Delete top module to upload a new one. mcafruni 1516d 12h /minimips_superscalar/
29 New banc register file. mcafruni 1516d 12h /minimips_superscalar/
28 Delete banc.vhd to upload a new one. mcafruni 1516d 12h /minimips_superscalar/
27 New bench on P1 tag. mcafruni 1516d 12h /minimips_superscalar/
26 Delete bench to upload a new one. mcafruni 1516d 12h /minimips_superscalar/
25 New bench mcafruni 1516d 12h /minimips_superscalar/
24 Delete bench to upload a new one. mcafruni 1516d 12h /minimips_superscalar/
23 Moving the benchmarks folder into the trunk folder. mcafruni 1522d 07h /minimips_superscalar/
22 Wrong code. (fi0.bin) But revealed a bug that needs attention. mcafruni 1522d 07h /minimips_superscalar/
21 Correcting codes that work in behavioral simulation but cause problems with implementation. There must be more to be corrected yet. In analysis ... mcafruni 1522d 07h /minimips_superscalar/
20 I've uncommented wait statement so that the benchmark to be loaded into the simulation. mcafruni 1556d 19h /minimips_superscalar/
19 mcafruni 1890d 11h /minimips_superscalar/
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 1890d 11h /minimips_superscalar/
17 Removing unnecessary clock-gate architecture. mcafruni 1890d 12h /minimips_superscalar/
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1923d 21h /minimips_superscalar/
15 FIR filter with 36 coefficients. mcafruni 1923d 21h /minimips_superscalar/
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1927d 15h /minimips_superscalar/
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1927d 15h /minimips_superscalar/
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1927d 16h /minimips_superscalar/
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1927d 16h /minimips_superscalar/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.