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[/] [plasma/] [trunk/] [vhdl/] - Rev 431

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Rev Log message Author Age Path
429 Changed INIT bit length in RAM16X1D and RAM32X1D rhoads 3990d 00h /plasma/trunk/vhdl/
428 Fix mult bugs "0*-1" and "-5%12". rhoads 4005d 05h /plasma/trunk/vhdl/
404 Changed spacing rhoads 4742d 21h /plasma/trunk/vhdl/
403 Disable Ethernet and cache when simulating. rhoads 4742d 21h /plasma/trunk/vhdl/
397 Added RAM32X1D option rhoads 4876d 14h /plasma/trunk/vhdl/
391 Better fix for 0x8000000 * negative number rhoads 5028d 20h /plasma/trunk/vhdl/
390 Handle special case of signed mult of 0x80000000 and a negative number rhoads 5031d 19h /plasma/trunk/vhdl/
383 Permit up to 64KB internal RAM and updated cache code. rhoads 5038d 20h /plasma/trunk/vhdl/
377 Fix cache_we warning rhoads 5182d 02h /plasma/trunk/vhdl/
376 Add write_enable to sensitivity list for Altera rhoads 5182d 04h /plasma/trunk/vhdl/
374 Fixed comment rhoads 5227d 17h /plasma/trunk/vhdl/
371 rhoads 5377d 06h /plasma/trunk/vhdl/
370 Fix "SLTIU v0, a0, -4000" by making imm signed rhoads 5377d 06h /plasma/trunk/vhdl/
369 Simplify E_RX_CLK usage rhoads 5382d 18h /plasma/trunk/vhdl/
365 Added UNISIM comment rhoads 5440d 18h /plasma/trunk/vhdl/
356 Added space to align text rhoads 5492d 17h /plasma/trunk/vhdl/
352 linus 5541d 10h /plasma/trunk/vhdl/
350 root 5570d 06h /plasma/trunk/vhdl/
348 Added comment for 32MB and 128MB DDR parts rhoads 5601d 01h /plasma/trunk/vhdl/
347 Xilinx ISE Project file rhoads 5601d 01h /plasma/trunk/vhdl/
346 Support optional 4KB cache rhoads 5638d 01h /plasma/trunk/vhdl/
345 Commented out optional mult speedup rhoads 5641d 22h /plasma/trunk/vhdl/
344 Fixed compiler warning rhoads 5641d 22h /plasma/trunk/vhdl/
343 Initial working cache rhoads 5641d 22h /plasma/trunk/vhdl/
337 Initial attempt at a cache rhoads 5647d 02h /plasma/trunk/vhdl/
335 Use enable signal for byte_we rhoads 5688d 20h /plasma/trunk/vhdl/
334 Short time for averaging read signal for 12.5 MHz case rhoads 5698d 20h /plasma/trunk/vhdl/
333 Updated Altera lpm_ram_dp usage for Cyclone FPGAs rhoads 5698d 20h /plasma/trunk/vhdl/
332 Updated Altera lpm_ram_dp rhoads 5698d 20h /plasma/trunk/vhdl/
331 Commented out unconnected signals rhoads 5759d 20h /plasma/trunk/vhdl/

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