URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] - Rev 34

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Rev	Log message	Author	Age	Path
34	Adding first version of logical egress.	magro732	3565d 16h	/rio/
33	Adding common logical layer module.	magro732	3566d 21h	/rio/
32	branches/singleSymbol Adding a wait-state to only insert one control-symbol into an outbound packet.	magro732	3570d 00h	/rio/
31	Fixing compiler errors. Adding support for inserting control-symbols from receiver into frames.	magro732	3572d 01h	/rio/
30	Changing name tags/1.0.1 to tags/1.0.1-release.	magro732	3572d 03h	/rio/
29	Fixed bug in RioSwitch internal Wishbone interconnects.	magro732	3572d 04h	/rio/
28	Correcting bug in RioSwitch.vhd internal Wishbone interconnect. Modifying an existing test case in TestRioSwitch.vhd to provoke the error.	magro732	3572d 04h	/rio/
27	Adding missing code to single-symbol pipelined transmitter. Not tested nor copiled.	magro732	3573d 15h	/rio/
26	Temporary checkin of parallelSymbols branch. It does not work yet.	magro732	3734d 03h	/rio/
25	Correcting compiler errors in TestRioPcsUart.vhd	magro732	3740d 21h	/rio/
24	Changing errornous use statement.	magro732	3740d 21h	/rio/
23	Tagging alpha release 2.0.0.	magro732	3857d 15h	/rio/
22	Tagging release 1.0.0.	magro732	3857d 15h	/rio/
21	Branching of a single symbol version of the new RioSerial.	magro732	3857d 15h	/rio/
20	Adding software C-stack and matching VHDL modules.	magro732	3922d 17h	/rio/
19	Removing synthesis warnings.	magro732	3947d 17h	/rio/
18	Making RioSerial entity the same as before+minor fixes.	magro732	3948d 15h	/rio/
17	Removing latch and improving timing.	magro732	3949d 16h	/rio/
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	3949d 16h	/rio/
15	All testcases are ok. Still needs some tweeks though.	magro732	3953d 17h	/rio/
14	Most issues solved, testbench issues remains.	magro732	3956d 16h	/rio/
13	Timeouts are working.	magro732	3959d 17h	/rio/
12	Backup of recent work, debugging new RioSerial.	magro732	3970d 16h	/rio/
11	Receiver ready, transmitter is compiling.	magro732	3970d 17h	/rio/
10	Branch to develop support for parallel symbols.	magro732	3970d 17h	/rio/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4012d 04h	/rio/
8	Adding signal descriptions in comments.	magro732	4055d 18h	/rio/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4142d 21h	/rio/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4142d 23h	/rio/
5	Uploading primitive documentation.	magro732	4149d 16h	/rio/

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Subversion Repositories rio

[/] [rio/] - Rev 34

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