OpenCores
URL https://opencores.org/ocsvn/spi_boot/spi_boot/trunk

Subversion Repositories spi_boot

[/] [spi_boot/] [tags/] [rel_3_2_rev_C/] - Rev 74

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
74 New directory structure. root 5570d 22h /spi_boot/tags/rel_3_2_rev_C/
73 This commit was manufactured by cvs2svn to create tag 'rel_3_2_rev_C'. 6150d 09h /tags/rel_3_2_rev_C/
72 mention bit_reverse.c arniml 6150d 09h /trunk/
67 added fix note for
"MD55 assumed to be nonexistent for MMC"
arniml 6151d 07h /trunk/
66 fix bug
"CMD55 assumed to be nonexistent for MMC"
arniml 6151d 07h /trunk/
64 revision 3.3:
* additional check for illegal command on ACMD41
* extension of set selection vector
arniml 6151d 07h /trunk/
63 additional check for illegal command on ACMD41 arniml 6151d 07h /trunk/
62 use linker option to strip executable arniml 6151d 08h /trunk/
61 follow change of set_sel_i width arniml 6152d 08h /trunk/
60 enlarge set_sel_i input to fill all upper bits of the 32 bit address vector arniml 6152d 08h /trunk/
59 added bug report
"CMD55 assumed to be nonexistent for MMC"
arniml 6153d 11h /trunk/
58 fix type handling of resets arniml 6314d 13h /trunk/
57 disable outputs with reset arniml 6481d 08h /trunk/
56 source code kindly provided by Michael Libeskind arniml 6594d 19h /trunk/
55 document rev. 3.2 arniml 6660d 14h /trunk/
54 revision 3.2:
+ detailed description of generic parameters
+ formatting and typos fixed
arniml 6660d 14h /trunk/
53 fix last set number arniml 6660d 15h /trunk/
52 fix typo arniml 6660d 16h /trunk/
51 revision 3.1:
+ formatting corrected
arniml 6994d 20h /trunk/
50 document rev. 3.1 arniml 6994d 20h /trunk/
49 add doc directory to project structure arniml 6996d 10h /trunk/
48 add ram_loader and related testbench arniml 6996d 10h /trunk/
47 schematic revision C arniml 6996d 10h /trunk/
46 document rev. 3.0 arniml 6996d 10h /trunk/
45 revision 3.0:
+ added detached output
+ describe interfacing on data port
+ several improvements
arniml 6996d 10h /trunk/
44 add detached output arniml 6996d 10h /trunk/
43 add new testbench for ram_loader arniml 7000d 13h /trunk/
42 initial check-in arniml 7000d 13h /trunk/
41 rework for detached_i information arniml 7000d 14h /trunk/
40 add new port detached_o arniml 7003d 11h /trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.