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URL https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk

Subversion Repositories virtex7_pcie_dma

[/] [virtex7_pcie_dma/] [trunk/] - Rev 35

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Rev Log message Author Age Path
35 FIXED:
* PCIe lock when reading registers on a high frequency
* Added threshold registers for Prog Full of the FromHost fifo
* Code cleanup
fransschreuder 2801d 08h /virtex7_pcie_dma/trunk/
34 FIXED:
* Wrong TLP length reported on register writes
* Two simultaneous interrupts were not handled
* XADC wizard for ultrascale devices

Added:
* Added voltage (int, aux, bram) readout on XADC wizards
fransschreuder 2907d 02h /virtex7_pcie_dma/trunk/
33 ADDED:
-- supportedtools.tex, again to test the OC repo
aborga 2952d 01h /virtex7_pcie_dma/trunk/
32 MODIFIED:
-- minor things just to test OC svn repo
aborga 2952d 01h /virtex7_pcie_dma/trunk/
31 Added example application documentation. oussamak 3046d 03h /virtex7_pcie_dma/trunk/
30 Added:
* Wupper GUI with speed test and chain test
* Added wupper-dma-transfer, wupper-chaintest and wupper-write
* Several bug fixes in the Wupper tools
oussamak 3046d 04h /virtex7_pcie_dma/trunk/
29 Improved application to reflect both up and down transfers fransschreuder 3088d 01h /virtex7_pcie_dma/trunk/
28 Added registermap reset fransschreuder 3088d 04h /virtex7_pcie_dma/trunk/
27 Fixed:
* BUG 2580: Missing packets in receive (PC => FPGA) path

Changed:
* Client tags now handled by Xilinx IP core
* fifo signals to reflect upfifo and downfifo naming
fransschreuder 3088d 06h /virtex7_pcie_dma/trunk/
26 Added sys_clk constraint fransschreuder 3088d 09h /virtex7_pcie_dma/trunk/
25 Added scripts and constraints for KCU105 fransschreuder 3088d 09h /virtex7_pcie_dma/trunk/
24 Added:
* Support for KCU105 board in code
TODO
* Add constraints and build scripts for KCU105
fransschreuder 3089d 03h /virtex7_pcie_dma/trunk/
23 Fixed reset of application registers fransschreuder 3146d 08h /virtex7_pcie_dma/trunk/
22 Added dma_soft_reset to trigger register resets fransschreuder 3152d 08h /virtex7_pcie_dma/trunk/
21 Fixed BUG http://opencores.org/bug,view,2562 fransschreuder 3161d 05h /virtex7_pcie_dma/trunk/
20 Fixed:
* Missing packets if the fifo goes empty during a TLP
* Dynamically change the empty threshold of the main fifo to TLP size
fransschreuder 3175d 04h /virtex7_pcie_dma/trunk/
19 * driver/README updated oussamak 3181d 06h /virtex7_pcie_dma/trunk/
18 Changed:
* Added drivers
* Added Wupper tools for debugging
* Added card ID register
oussamak 3181d 07h /virtex7_pcie_dma/trunk/
17 Changed name of toplevel, to make tree consistent oussamak 3195d 10h /virtex7_pcie_dma/trunk/
16 MODIFED:
-- top level name to wupper_oc (including scripts)
aborga 3245d 04h /virtex7_pcie_dma/trunk/
15 MODIFIED:
-- Renamed core to Wupper (vhdl files)
-- Changed width of interrupt enable to number_of_interrupts
fransschreuder 3245d 04h /virtex7_pcie_dma/trunk/
14 RENAMED:
-- simulation folder
aborga 3245d 05h /virtex7_pcie_dma/trunk/
13 RENAMED:
-- script
aborga 3245d 05h /virtex7_pcie_dma/trunk/
12 Fixed http://opencores.org/bug,view,2524 fransschreuder 3320d 05h /virtex7_pcie_dma/trunk/
11 MODIFIED:
-- updated documentation
aborga 3333d 03h /virtex7_pcie_dma/trunk/
10 Changed:
LOC => Package_pin
fransschreuder 3343d 04h /virtex7_pcie_dma/trunk/
9 Added actual version information (Build date and svn revision) in BOARD_ID register fransschreuder 3372d 02h /virtex7_pcie_dma/trunk/
8 Changed:
* Added support for circular DMA (wrap around)
* Fixed Read / Write interrupts
fransschreuder 3372d 08h /virtex7_pcie_dma/trunk/
7 Changed:
* Simplified address calculation to relax timing
* Changed slow register clock from 40 MHz to 250/6=41.667MHz to relax timing
* Omit need of external clock crystal on the board (all clocks are now derived from the 100MHz pcie refclk
* Added support for the High tech Global HTG710 board
fransschreuder 3412d 04h /virtex7_pcie_dma/trunk/
6 Changed:
* fixed bug #1 First read of registers sometimes fails. Added extra pipeline stage on read / write enable
* Fixed missing signals in sensitivity list
fransschreuder 3418d 02h /virtex7_pcie_dma/trunk/

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