URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

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Rev	Log message	Author	Age	Path
82	correct some typoes, thanks to Hu, Tao	wsong0210	4019d 03h	/
81	adding a solution in README to a cell lib problem.	wsong0210	4387d 03h	/
80	make the README file more understandable	wsong0210	4466d 23h	/
79	update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation	wsong0210	4527d 09h	/
78	pass link	wsong0210	4693d 21h	/
77	pass syn elaboration	wsong0210	4694d 20h	/
76	fix syntex	wsong0210	4698d 21h	/
75	code finished, start the debugging	wsong0210	4698d 21h	/
74	in/out buffer finished	wsong0210	4699d 21h	/
73	input buffer	wsong0210	4706d 20h	/
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4707d 20h	/
71	the buffered 2-stage Clos switch	wsong0210	4708d 20h	/
70	clos-opt ongoing	wsong0210	4708d 20h	/
69	central module of the Clos	wsong0210	4711d 20h	/
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4712d 21h	/
67	structure not good, prepare to use new files	wsong0210	4712d 22h	/
66	clos opt ongoing	wsong0210	4727d 15h	/
65	pipeline controller	wsong0210	4727d 15h	/
64	clos opt ongoing	wsong0210	4727d 15h	/
63	clos opt ongoing	wsong0210	4727d 20h	/
62	clos opt ongoing	wsong0210	4728d 21h	/
61	settle down the pipeline controller	wsong0210	4733d 20h	/
60	try to make the address comparison relaxed QDI	wsong0210	4736d 21h	/
59	address deduction	wsong0210	4738d 20h	/
58	opt ongoing 10/06/2011	wsong0210	4739d 21h	/
57	insert buffers inside clos	wsong0210	4739d 23h	/
56	the first released version of Wormhole/SDM/VC	wsong0210	4740d 20h	/
55	merge reference list	wsong0210	4740d 20h	/
54	reference list	wsong0210	4740d 20h	/
53	merge from branch for doc	wsong0210	4740d 20h	/

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Subversion Repositories async_sdm_noc

[/] - Rev 82

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