URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 345

Rev	Log message	Author	Age	Path
345	remove trunk after tagging rel_1_4	arniml	482d 22h	/
344	release 1.4	arniml	482d 22h	/
343	branch wip_t2x merged into trunk at 342	arniml	482d 22h	/
342	merge branch wip_t2x into trunk	arniml	482d 22h	/
341	interrupt test for 8022	arniml	506d 01h	/
340	adapt int tests to ALE sampling	arniml	506d 01h	/
339	fix RETI for 8022	arniml	506d 01h	/
338	sample int with rising ALE	arniml	506d 01h	/
337	t8022 synthesis	arniml	506d 02h	/
336	docs	arniml	506d 04h	/
335	simplify up41 test setup	arniml	506d 07h	/
334	fix timing of sel_an*, rad	arniml	506d 18h	/
333	add t8022	arniml	507d 00h	/
332	mcs2x tests	arniml	507d 20h	/
331	release 1.3	arniml	508d 02h	/
330	add t8021	arniml	508d 02h	/
329	start work on t2x	arniml	508d 20h	/
328	prepare 1.3	arniml	510d 22h	/
327	update integration manual	arniml	511d 19h	/
326	refine status_q update	arniml	512d 00h	/
325	experimental upi41_db_bus variant with asynchronous master interface	arniml	512d 07h	/
324	enhance access timing in test bench	arniml	512d 07h	/
323	- prevent change when master reads status - relax master access timing	arniml	513d 06h	/
322	hold db_dir_o during entire access	arniml	514d 21h	/
321	improve compatibility with modelsim and ghdl	arniml	515d 19h	/
320	improve in test	arniml	515d 19h	/
319	- add dma test - update dma logic	arniml	517d 21h	/
318	t8042ah synth, fix warnings	arniml	518d 01h	/
317	implement dma logic	arniml	518d 03h	/
316	doc	arniml	518d 07h	/