URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] [async_sdm_noc/] - Rev 82

Rev	Log message	Author	Age	Path
82	correct some typoes, thanks to Hu, Tao	wsong0210	4019d 07h	/async_sdm_noc/
81	adding a solution in README to a cell lib problem.	wsong0210	4387d 07h	/async_sdm_noc/
80	make the README file more understandable	wsong0210	4467d 03h	/async_sdm_noc/
79	update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation	wsong0210	4527d 13h	/async_sdm_noc/
78	pass link	wsong0210	4694d 01h	/async_sdm_noc/
77	pass syn elaboration	wsong0210	4695d 00h	/async_sdm_noc/
76	fix syntex	wsong0210	4699d 00h	/async_sdm_noc/
75	code finished, start the debugging	wsong0210	4699d 01h	/async_sdm_noc/
74	in/out buffer finished	wsong0210	4700d 01h	/async_sdm_noc/
73	input buffer	wsong0210	4707d 00h	/async_sdm_noc/
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4708d 00h	/async_sdm_noc/
71	the buffered 2-stage Clos switch	wsong0210	4709d 00h	/async_sdm_noc/
70	clos-opt ongoing	wsong0210	4709d 00h	/async_sdm_noc/
69	central module of the Clos	wsong0210	4712d 00h	/async_sdm_noc/
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4713d 00h	/async_sdm_noc/
67	structure not good, prepare to use new files	wsong0210	4713d 02h	/async_sdm_noc/
66	clos opt ongoing	wsong0210	4727d 18h	/async_sdm_noc/
65	pipeline controller	wsong0210	4727d 19h	/async_sdm_noc/
64	clos opt ongoing	wsong0210	4727d 19h	/async_sdm_noc/
63	clos opt ongoing	wsong0210	4727d 23h	/async_sdm_noc/