URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] - Rev 30

Rev	Log message	Author	Age	Path
30	irun update	dinesha	2713d 06h	/oms8051mini/trunk/verif/
29	i2c master test cased added	dinesha	2713d 07h	/oms8051mini/trunk/verif/
27	I2C master is integrated	dinesha	2714d 05h	/oms8051mini/trunk/verif/
25	8051 core reset active edge changed from high to low	dinesha	2715d 08h	/oms8051mini/trunk/verif/
24	All Instruction C code added	dinesha	2717d 02h	/oms8051mini/trunk/verif/
23	c code removed	dinesha	2717d 02h	/oms8051mini/trunk/verif/
22	New C Model added	dinesha	2717d 02h	/oms8051mini/trunk/verif/
21	New test case	dinesha	2717d 06h	/oms8051mini/trunk/verif/
19	Uart Message Handler added as register master	dinesha	2730d 07h	/oms8051mini/trunk/verif/
16	.dat file is removed from svn	dinesha	2738d 12h	/oms8051mini/trunk/verif/
15	Clean up	dinesha	2738d 12h	/oms8051mini/trunk/verif/
14	Tb Clean up	dinesha	2739d 04h	/oms8051mini/trunk/verif/
11	changed 32 bit to 8 bit register interface	dinesha	2742d 04h	/oms8051mini/trunk/verif/
10	EXTERNAL ROM option is removed	dinesha	2743d 13h	/oms8051mini/trunk/verif/
9	Modelsim golden log file	dinesha	2753d 05h	/oms8051mini/trunk/verif/
8	irun update for cadence flow	dinesha	2753d 05h	/oms8051mini/trunk/verif/
7	Uart test case cleanup	dinesha	2753d 05h	/oms8051mini/trunk/verif/
6	Uart Message Handler added into SVN and Uart fixs	dinesha	2753d 08h	/oms8051mini/trunk/verif/
5	Irun Rename	dinesha	2754d 05h	/oms8051mini/trunk/verif/
4	Irun update	dinesha	2754d 05h	/oms8051mini/trunk/verif/