URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] - Rev 645

Rev	Log message	Author	Age	Path
625	Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available.	jeremybennett	4685d 21h	/openrisc/
624	add missing delay slot instruction vPortDisableInterrupts vPortEnableInterrupts	filepang	4687d 01h	/openrisc/
623	cleanup source code Demo/OpenRISC_SIM_GCC/arch/support.h Demo/OpenRISC_SIM_GCC/arch/interrupts.h Demo/OpenRISC_SIM_GCC/arch/link.ld add gpio driver add gpio base address definition	filepang	4687d 17h	/openrisc/
622	update uart driver for support multiple uart cores from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart	filepang	4687d 19h	/openrisc/
621	update sim.cfg for newer version of Or1ksim. remove unused files. cleanup source code. insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will be returned by xPortEndScheduler().	filepang	4689d 11h	/openrisc/
620	remove unused file cleanup makefile update uart_init(), disable interrupt before initialize.	jeremybennett	4690d 00h	/openrisc/
619	ORPSoC OR1200 fix and regression test for bug 51. signed-off Julius Baxter reviewed by Stefan Kristiansson	julius	4698d 12h	/openrisc/
618	Remove unused parameter Tp	olof	4698d 19h	/openrisc/
617	Set tx_negedge correctly (Fixes bug #12)	olof	4702d 22h	/openrisc/
616	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4703d 20h	/openrisc/