OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] - Rev 854

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
664 FreeRTOSV6.1.1
modify processor abstraction layer.
now,all tasks are running in supervisor mode
filepang 4562d 04h /openrisc/trunk/rtos/
659 Fixed longjmp hal implementation skrzyp 4584d 08h /openrisc/trunk/rtos/
658 example configuration uses RAM startup skrzyp 4602d 05h /openrisc/trunk/rtos/
657 test generation fixed skrzyp 4602d 07h /openrisc/trunk/rtos/
654 added eCos-3.0 port skrzyp 4608d 02h /openrisc/trunk/rtos/
649 porting some of standard demo tasks

fix serial port(UART) interrupt handler
filepang 4637d 03h /openrisc/trunk/rtos/
637 porint parallel port(gpio) management task filepang 4664d 04h /openrisc/trunk/rtos/
636 porting serial port management task, interrupt hander filepang 4664d 04h /openrisc/trunk/rtos/
624 add missing delay slot instruction
vPortDisableInterrupts
vPortEnableInterrupts
filepang 4676d 11h /openrisc/trunk/rtos/
623 cleanup source code
Demo/OpenRISC_SIM_GCC/arch/support.h
Demo/OpenRISC_SIM_GCC/arch/interrupts.h
Demo/OpenRISC_SIM_GCC/arch/link.ld

add gpio driver

add gpio base address definition
filepang 4677d 02h /openrisc/trunk/rtos/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.