URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 155

Rev	Log message	Author	Age	Path
135	prepared start of receiving if ren is not active.	simont	7712d 04h	/
134	fix bug in case execution of two data dependent instructions.	simont	7712d 05h	/
133	fix bug in substraction.	simont	7712d 07h	/
132	change branch instruction execution (reduse needed clock periods).	simont	7715d 23h	/
131	prepare programs for new timing.	simont	7715d 23h	/
130	prepared programs for new timing.	simont	7715d 23h	/
129	updated...	simont	7715d 23h	/
128	chance idat_ir to 24 bit wide	simont	7725d 06h	/
127	fix bug (cyc_o and stb_o)	simont	7725d 06h	/
126	define OC8051_XILINX_RAMB added	simont	7725d 06h	/