URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] - Rev 867

Rev	Log message	Author	Age	Path
847	or1200_genpc: fix ipcu_cycstb_o generation In some circumstances the CPU is still waiting for the lsu to finish while in a pre branch state. However, ipcu_cycstb_o is set and the cycle starts with the wrong address on the iwb bus (the one before the branched address). This fixes this issue. Patch by: Franck Jullien <franck.jullien@gmail.com>	stekern	4228d 18h	/
846	or1200: Fix for cache bug related to first_{hit\|miss}_ack Under certain circumstances, when first_hit_ack and first_miss_ack is asserted at the same time, cache data would wrongly be overwritten with bus data. Patch by: Matthew Hicks <firefalcon@gmail.com>	stekern	4228d 18h	/
845	or1200: l.lws support Using the l.lws instruction doesn't work currently. It simply skips the instruction. No exception or reaction. The patch attached simply duplicates the behaviour of l.lwz for l.lws. Patch by: Jeppe Græsdal Johansen <jjohan07@student.aau.dk>	stekern	4228d 18h	/
844		skrzyp	4229d 11h	/
843	Applied RDiez suggestions	skrzyp	4229d 11h	/
842	Moving GDB 7.1 into the old collection.	jeremybennett	4231d 09h	/
841	GDB 7.2 is now considered the stable version.	jeremybennett	4231d 10h	/
840	Relocate GDB 6.8 to the old directory.	jeremybennett	4231d 10h	/
839	Forgot about updating linker flags, thanks RDiez!	skrzyp	4232d 13h	/
838	added branch-delay option and sets r0 to zero	skrzyp	4233d 02h	/