URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] - Rev 34

Rev	Log message	Author	Age	Path
34	uart test case update	dinesha	2706d 14h	/oms8051mini/trunk/verif
33	Unused test log are deleted	dinesha	2708d 18h	/oms8051mini/trunk/verif
32	i2c test case added	dinesha	2708d 18h	/oms8051mini/trunk/verif
31	I2C Master Test cases are added	dinesha	2709d 12h	/oms8051mini/trunk/verif
30	irun update	dinesha	2709d 16h	/oms8051mini/trunk/verif
29	i2c master test cased added	dinesha	2709d 16h	/oms8051mini/trunk/verif
27	I2C master is integrated	dinesha	2710d 14h	/oms8051mini/trunk/verif
25	8051 core reset active edge changed from high to low	dinesha	2711d 18h	/oms8051mini/trunk/verif
24	All Instruction C code added	dinesha	2713d 12h	/oms8051mini/trunk/verif
23	c code removed	dinesha	2713d 12h	/oms8051mini/trunk/verif
22	New C Model added	dinesha	2713d 12h	/oms8051mini/trunk/verif
21	New test case	dinesha	2713d 15h	/oms8051mini/trunk/verif
19	Uart Message Handler added as register master	dinesha	2726d 17h	/oms8051mini/trunk/verif
16	.dat file is removed from svn	dinesha	2734d 21h	/oms8051mini/trunk/verif
15	Clean up	dinesha	2734d 21h	/oms8051mini/trunk/verif
14	Tb Clean up	dinesha	2735d 14h	/oms8051mini/trunk/verif
11	changed 32 bit to 8 bit register interface	dinesha	2738d 13h	/oms8051mini/trunk/verif
10	EXTERNAL ROM option is removed	dinesha	2739d 23h	/oms8051mini/trunk/verif
9	Modelsim golden log file	dinesha	2749d 15h	/oms8051mini/trunk/verif
8	irun update for cadence flow	dinesha	2749d 15h	/oms8051mini/trunk/verif