URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [alu16.v] - Rev 18

Rev	Log message	Author	Age	Path
18	fixed interrupt handling	ale500	3419d 01h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
17	Bugfixes	ale500	3507d 22h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
16	Fix ABX, TST, implemented new decoder, removed unused logic	ale500	3595d 22h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
12	Fixed inc, dec, indirect indexed, mul, shifts, h flag	ale500	3620d 03h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
10	Fixed several extended and indirect opcodes	ale500	3627d 03h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
9	Implemented E flag, some minor optimizations	ale500	3801d 03h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
6	Implemented CWAI. Minor optimizations	ale500	3805d 23h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
5	EXG/TFR Implemented	ale500	3806d 19h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
4	Bugfix and enhancements	ale500	3808d 01h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v
2	Initial version	ale500	3809d 22h	/6809_6309_compatible_core/trunk/rtl/verilog/alu16.v