URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_wb_iinterface.v] - Rev 136

Rev	Log message	Author	Age	Path
136	registering outputs.	simont	7714d 16h	/8051/trunk/rtl/verilog/oc8051_wb_iinterface.v
127	fix bug (cyc_o and stb_o)	simont	7733d 17h	/8051/trunk/rtl/verilog/oc8051_wb_iinterface.v
110	change adr_i and adr_o length.	simont	7746d 07h	/8051/trunk/rtl/verilog/oc8051_wb_iinterface.v
82	replace some modules	simont	7826d 12h	/8051/trunk/rtl/verilog/oc8051_wb_iinterface.v
73	initial import	simont	7903d 10h	/8051/trunk/rtl/verilog/oc8051_wb_iinterface.v