URL https://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk

Subversion Repositories adv_debug_sys

[/] [adv_debug_sys/] [trunk/] [Hardware/] [adv_dbg_if/] [rtl/] [verilog/] [adbg_jsp_module.v] - Rev 51

Rev	Log message	Author	Age	Path
51	Added support for hardware watchpoints, including a hardware patch for the OR1200v1, changes to adv_jtag_bridge, and a GUI client program. Added a new top-level Patches directory for patches for third-party code. Added FreeBSD support to adv_jtag_bridge (contributed by Wojciech Koszek).	nyawn	5019d 04h	/adv_debug_sys/trunk/Hardware/adv_dbg_if/rtl/verilog/adbg_jsp_module.v
42	Added (experimental) Actel UJTAG TAP core. Added JTAG serial port feature to debug hardware core and JTAG bridge program. Added more speedups for USB JTAG cables to bridge program - USB-Blaster users should now see ~30k/sec upload speeds. Updated documentation.	nyawn	5172d 14h	/adv_debug_sys/trunk/Hardware/adv_dbg_if/rtl/verilog/adbg_jsp_module.v