URL https://opencores.org/ocsvn/aemb/aemb/trunk

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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB2_iwbif.v] - Rev 203

Rev	Log message	Author	Age	Path
203	optimised exception signals.	sybreon	5438d 21h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
202	added basic exception signals.	sybreon	5438d 21h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
191	New directory structure.	root	5568d 23h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
148	added iwb_tag_o signal tied to MSR_ICE.	sybreon	5884d 22h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
131	Passes basic tests. Minor documentation changes to make it compatible with iverilog pre-processor.	sybreon	5886d 17h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
125	Passes arithmetic tests with single thread.	sybreon	5891d 06h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
120	Basic version with some features left out.	sybreon	5892d 01h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v
118	Initial import.	sybreon	5894d 18h	/aemb/trunk/rtl/verilog/aeMB2_iwbif.v