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[/] [csa/] [trunk/] [bench/] [makefile] - Rev 51

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Rev Log message Author Age Path
51 remove the using to iverilog and veriwell simon111 5517d 03h /csa/trunk/bench/makefile
40 add timescale.v file and fix a bug in key_schedule module simon111 5533d 16h /csa/trunk/bench/makefile
29 fix some bugs simon111 5536d 15h /csa/trunk/bench/makefile
27 improve makefiles simon111 5537d 02h /csa/trunk/bench/makefile
24 New directory structure. root 5573d 08h /csa/trunk/bench/makefile
23 testing key_schedule module simon111 5656d 15h /csa/trunk/bench/makefile
22 decrypt module testbench update simon111 5696d 15h /csa/trunk/bench/makefile
20 finished the stream_cypher module, this module passed modelsim , but doesn't pass veriwell, i don't know why simon111 5710d 14h /csa/trunk/bench/makefile
18 try to add decrypt module (not finished yet) simon111 5720d 15h /csa/trunk/bench/makefile
17 finish block_decypher module simon111 5771d 21h /csa/trunk/bench/makefile
15 finished key_schedule module simon111 5779d 15h /csa/trunk/bench/makefile
12 *** empty log message *** simon111 5780d 15h /csa/trunk/bench/makefile
9 add the pli module and bench for key_perm module simon111 5813d 17h /csa/trunk/bench/makefile

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