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[/] [ion/] [trunk/] [vhdl/] [demo/] [c2sb_demo.vhdl] - Rev 234

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234 Added a few GPIO registers to the SoC, updated the DE-1 'top' file to drive the SD interface with the GPIO signals. ja_rd 4217d 20h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
233 Fixed top entity for De-1 demos: Bootstrap BRAM size is now taken from a constant in the obj code package. ja_rd 4236d 07h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
226 Updated demo and test bench to use new SoC entity. ja_rd 4365d 01h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
200 CPU interrupt input changed to 8-bit vector
Other modules changed accordingly
Interrupts still missing; this is just preparing the interface
ja_rd 4689d 18h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
162 Fixed stupid mistake in headers (date of project) ja_rd 4741d 16h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
161 Added GPL license info to the vhdl headers
This project is becoming respectable :)
ja_rd 4741d 16h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
136 Added debug output to synthesizable MPU template, and connected debug signals to LEDs ja_rd 4749d 18h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
116 Updated demo 'top' file for DE-1 board
- Added reset button debouncing
- Added template for using different clock input
- Uses clock rate generic
ja_rd 4807d 20h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
75 Added support for 8-bit-wide static memory (e.g. Flash)
Updated demo 'top' file to use the DE-1 onboard flash
ja_rd 4861d 17h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
63 DE-1 demo top module:
added registers for SD interface, switches and 7-seg display
ja_rd 4862d 10h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
59 cleaned up top vhdl module of demo
moved reset sync ff chain to top module
updated pre-generated demo file
ja_rd 4864d 00h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
46 First version of cache: stub, 1-word cache
Stub cache tested on simulation and HW, just a stub
Adapted CPU stall logic to 1st version of cache
Adapted all other modules for compatibility with cache
ja_rd 4864d 16h /ion/trunk/vhdl/demo/c2sb_demo.vhdl
2 First commit (includes 'hello' demo) ja_rd 4873d 23h /ion/trunk/vhdl/demo/c2sb_demo.vhdl

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