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[/] [ion/] [trunk/] [vhdl/] [mips_pkg.vhdl] - Rev 251

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Rev Log message Author Age Path
251 Extracted COP0 logic to separate module within CPU.
Preliminary step for COP0 refactor.
No change in functionality.		 ja_rd 3791d 13h /ion/trunk/vhdl/mips_pkg.vhdl
225 Added utility functions for the initialization of BRAM memories. ja_rd 4365d 01h /ion/trunk/vhdl/mips_pkg.vhdl
162 Fixed stupid mistake in headers (date of project) ja_rd 4741d 17h /ion/trunk/vhdl/mips_pkg.vhdl
161 Added GPL license info to the vhdl headers
This project is becoming respectable :)		 ja_rd 4741d 17h /ion/trunk/vhdl/mips_pkg.vhdl
134 Added 'unmapped access' flag to CPU core, meant for debug mostly.
Eventually this flag will trigger an interrupt.		 ja_rd 4749d 18h /ion/trunk/vhdl/mips_pkg.vhdl
120 Updated main package with lots of wait states for all areas ja_rd 4807d 19h /ion/trunk/vhdl/mips_pkg.vhdl
85 BUG FIX: log2 function was wrong ja_rd 4851d 20h /ion/trunk/vhdl/mips_pkg.vhdl
81 Added a wait state to the SRAM area for the DE-1 demo code ja_rd 4860d 15h /ion/trunk/vhdl/mips_pkg.vhdl
75 Added support for 8-bit-wide static memory (e.g. Flash)
Updated demo 'top' file to use the DE-1 onboard flash		 ja_rd 4861d 17h /ion/trunk/vhdl/mips_pkg.vhdl
72 Fixed stupid bug in SRAM write cycles (setup time violated)
Wait states implemented for SRAM wait and read cycles		 ja_rd 4861d 22h /ion/trunk/vhdl/mips_pkg.vhdl
64 Refactored memory decoding logic
(wait states and read-only attributes unimplemented yet)		 ja_rd 4862d 10h /ion/trunk/vhdl/mips_pkg.vhdl
48 Temporary fix to memory decoding constants ja_rd 4864d 16h /ion/trunk/vhdl/mips_pkg.vhdl
37 functions added to package for standard address decoding ja_rd 4868d 19h /ion/trunk/vhdl/mips_pkg.vhdl
12 Adapted multiplier unit from Plasma ja_rd 4872d 09h /ion/trunk/vhdl/mips_pkg.vhdl
2 First commit (includes 'hello' demo) ja_rd 4873d 23h /ion/trunk/vhdl/mips_pkg.vhdl

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