URL https://opencores.org/ocsvn/manchesterwireless/manchesterwireless/trunk

Subversion Repositories manchesterwireless

[/] [manchesterwireless/] [branches/] [singledouble/] [singleDouble/] [singleDouble.vhd] - Rev 9

Rev	Log message	Author	Age	Path
9	Modified next state logic to avoid gated clock on net clock_zero_en_0000 during bitgen process. As a default case the counter enables are de-asserted.	thiagu_comp	5454d 03h	/manchesterwireless/branches/singledouble/singleDouble/singleDouble.vhd
7	Added new singleDouble files	kingmu	5457d 06h	/manchesterwireless/branches/singledouble/singleDouble/singleDouble.vhd