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[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [eth.c] - Rev 442

Rev	Log message	Author	Age	Path
442	OR1Ksim - adding trace controlability by SIGUSR1 signal.	julius	4922d 17h	/openrisc/trunk/or1ksim/peripheral/eth.c
437	Or1ksim - ethernet peripheral update, working much better.	julius	4931d 13h	/openrisc/trunk/or1ksim/peripheral/eth.c
436	Or1ksim ethernet TAP updates. Ethernet test still failing.	julius	4932d 13h	/openrisc/trunk/or1ksim/peripheral/eth.c
434	Work in progress with new Ethernet TUN/TAP interface.	jeremybennett	4935d 20h	/openrisc/trunk/or1ksim/peripheral/eth.c
429	or1ksim update - remove debug printfs from eth MDIO emulation function and fix illegal instruction vector jump for invalid instructions.	julius	4939d 23h	/openrisc/trunk/or1ksim/peripheral/eth.c
428	or1ksim - adding preliminary PHY emulation to ethernet peripheral.	julius	4942d 19h	/openrisc/trunk/or1ksim/peripheral/eth.c
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5055d 04h	/openrisc/trunk/or1ksim/peripheral/eth.c
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5155d 20h	/openrisc/trunk/or1ksim/peripheral/eth.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5486d 05h	/openrisc/trunk/or1ksim/peripheral/eth.c