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[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [ChangeLog] - Rev 114

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114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5105d 15h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5106d 14h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
110 or1ksim make check should work without a libc in the or32-elf tools julius 5107d 15h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5109d 15h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
104 Candidate release 0.4.0rc4 jeremybennett 5112d 22h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5127d 17h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5148d 15h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5155d 15h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/ChangeLog

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