URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [inst-set-test/] [is-add-test.S] - Rev 114

Rev	Log message	Author	Age	Path
114	l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR.	jeremybennett	5113d 06h	/openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S
112	Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register.	jeremybennett	5114d 05h	/openrisc/trunk/or1ksim/testsuite/test-code-or1k/inst-set-test/is-add-test.S