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URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

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[/] [pcie_ds_dma/] [trunk] - Rev 43

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Rev Log message Author Age Path
43 Correction on PCI Express capabilities output. v.karak 3876d 16h /pcie_ds_dma/trunk
42 add coregen_s6 - components for Spartan 6 dsmv 3962d 05h /pcie_ds_dma/trunk
41 temp dsmv 3967d 05h /pcie_ds_dma/trunk
40 set wb_clk to 32 MHz dsmv 3968d 05h /pcie_ds_dma/trunk
39 add test_gen.cfg dsmv 3972d 05h /pcie_ds_dma/trunk
38 sp605_lx45t_wishbone - correct reset, block_test_check, block_test_generate dsmv 3975d 04h /pcie_ds_dma/trunk
37 sp605_lx45t_core v1.2 build_0x01 dsmv 3984d 04h /pcie_ds_dma/trunk
36 Remove unused Device IDs v.karak 3995d 18h /pcie_ds_dma/trunk
35 Add unistd.h for close() syscall. v.karak 3995d 18h /pcie_ds_dma/trunk
34 Remove __devinit and __devexit prefixes. v.karak 3995d 18h /pcie_ds_dma/trunk
33 Correctly search PCI Express Capability Register Set. v.karak 3995d 18h /pcie_ds_dma/trunk
32 Set 125 MHz for wishbone bus. Data transfered from TEST_GEN to computer without errors. dsmv 4000d 03h /pcie_ds_dma/trunk
31 correct wb_test dsmv 4000d 03h /pcie_ds_dma/trunk
30 data read from wb_gen with error dsmv 4007d 06h /pcie_ds_dma/trunk
29 Correct dmar, rst for wb_test; Add STATUS register. dsmv 4007d 07h /pcie_ds_dma/trunk
28 add test_dio.cfg out_dio.cfg dsmv 4019d 02h /pcie_ds_dma/trunk
27 update adm_test dsmv 4019d 02h /pcie_ds_dma/trunk
26 update for adm_test dsmv 4019d 02h /pcie_ds_dma/trunk
25 update test_main.cfg dsmv 4037d 04h /pcie_ds_dma/trunk
24 update test_main.cfg dsmv 4037d 05h /pcie_ds_dma/trunk

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