URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma] - Rev 40

Rev	Log message	Author	Age	Path
40	set wb_clk to 32 MHz	dsmv	3968d 13h	/pcie_ds_dma
39	add test_gen.cfg	dsmv	3972d 13h	/pcie_ds_dma
38	sp605_lx45t_wishbone - correct reset, block_test_check, block_test_generate	dsmv	3975d 12h	/pcie_ds_dma
37	sp605_lx45t_core v1.2 build_0x01	dsmv	3984d 12h	/pcie_ds_dma
36	Remove unused Device IDs	v.karak	3996d 03h	/pcie_ds_dma
35	Add unistd.h for close() syscall.	v.karak	3996d 03h	/pcie_ds_dma
34	Remove __devinit and __devexit prefixes.	v.karak	3996d 03h	/pcie_ds_dma
33	Correctly search PCI Express Capability Register Set.	v.karak	3996d 03h	/pcie_ds_dma
32	Set 125 MHz for wishbone bus. Data transfered from TEST_GEN to computer without errors.	dsmv	4000d 11h	/pcie_ds_dma
31	correct wb_test	dsmv	4000d 11h	/pcie_ds_dma
30	data read from wb_gen with error	dsmv	4007d 15h	/pcie_ds_dma
29	Correct dmar, rst for wb_test; Add STATUS register.	dsmv	4007d 15h	/pcie_ds_dma
28	add test_dio.cfg out_dio.cfg	dsmv	4019d 10h	/pcie_ds_dma
27	update adm_test	dsmv	4019d 10h	/pcie_ds_dma
26	update for adm_test	dsmv	4019d 10h	/pcie_ds_dma
25	update test_main.cfg	dsmv	4037d 13h	/pcie_ds_dma
24	update test_main.cfg	dsmv	4037d 13h	/pcie_ds_dma
23	Correct default settings value.	v.karak	4037d 18h	/pcie_ds_dma
22	correct wishbone_test_en.htm	dsmv	4049d 16h	/pcie_ds_dma
21	debug ambpex5_sx50t_wishbone	dsmv	4049d 16h	/pcie_ds_dma