URL https://opencores.org/ocsvn/raptor64/raptor64/trunk

Subversion Repositories raptor64

[/] [raptor64/] [trunk/] [rtl/] [verilog/] [Raptor64sc.v] - Rev 45

Rev	Log message	Author	Age	Path
45	- separate exception status per context - debugging PC -	robfinch	4151d 04h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
44	- fix: assert byte select lines during burst access - fixup bitfield instructions	robfinch	4157d 16h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
41	- change to 32 bit ISA	robfinch	4161d 22h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
33	- updated cpu files	robfinch	4180d 18h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
30	- separated out Branch History, regfile, and TLB	robfinch	4382d 21h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
29	- exception processing update	robfinch	4385d 16h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
25	- updated processor	robfinch	4395d 15h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
21	- fixes, loop, instruction buffer	robfinch	4408d 12h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
19	- added instruction buffer for non-icache operation	robfinch	4412d 18h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
16	- working on interrupt hardware	robfinch	4413d 16h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
14	- many changes - removed cmd bus from sc version -	robfinch	4414d 10h	/raptor64/trunk/rtl/verilog/Raptor64sc.v
13	- single context (sc) version of cpu	robfinch	4416d 15h	/raptor64/trunk/rtl/verilog/Raptor64sc.v