URL https://opencores.org/ocsvn/rtfsimpleuart/rtfsimpleuart/trunk

Subversion Repositories rtfsimpleuart

[/] [rtfsimpleuart/] [trunk/] [rtl/] [verilog/] [rtfSimpleUartTx.v] - Rev 12

Rev	Log message	Author	Age	Path
12	+BaudX8 mode !start frame detector - checks 1->0 transition !frame complectness - frame completes right after center of a frame bit, allows more difference of sender and reciever baud	AlexRayne	3851d 16h	/rtfsimpleuart/trunk/rtl/verilog/rtfSimpleUartTx.v
4	initial archive	robfinch	4647d 16h	/rtfsimpleuart/trunk/rtl/verilog/rtfSimpleUartTx.v