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[/] [sdhc-sc-core/] [trunk/] [grpSdVerification/] [unitSdCardModel/] [src/] [SdCardModel.sv] - Rev 185

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185 Restructuring as source repository: Moved sources out of src subdirectory. rkastl 4899d 04h /sdhc-sc-core/trunk/grpSdVerification/unitSdCardModel/src/SdCardModel.sv
184 Removed WbSlave shell (refs #69)
Moved verification sources to grpSdVerification (fixes #70)
rkastl 4901d 22h /SdCardModel.sv
170 License rewritten to BSD rkastl 4901d 22h /SdCardModel.sv
167 Read+Modify+Write works on HW

+ Fixed CRC status token (not mentioned in simplified spec)
+ Improved TestWbMaster to RMW
rkastl 4901d 22h /SdCardModel.sv
166 tbTbdSd: fixed rkastl 4901d 22h /SdCardModel.sv
164 Headers updated (LGPL, consistent format) rkastl 4901d 22h /SdCardModel.sv
160 Verification:
Full random read and write single blocks sequence works with
checks.
Checking the CRC in the card model is missing.
Writing at addresses above the card size is missing.
Erasing is missing.
rkastl 4901d 22h /SdCardModel.sv
159 Verification:
Further work: Checking RAM Actions and reading data is still
missing
rkastl 4901d 22h /SdCardModel.sv
158 Verification:
Work on Checking
Functional coverage
rkastl 4901d 22h /SdCardModel.sv
157 Verification:
Testcase with Reads works but Verification not completly
implemented.
rkastl 4901d 22h /SdCardModel.sv
153 SdVerification:
further development, not done by far
rkastl 4901d 22h /SdCardModel.sv
151 Verification:
+ redesign: not functional yet
rkastl 4901d 22h /SdCardModel.sv
150 Testbed:
+ Simulation made possible
+ Write works
- Sometimes the alignment in the block is not right
rkastl 4901d 22h /SdCardModel.sv
149 SdBFM:
+ mailbox mode
rkastl 4901d 22h /SdCardModel.sv
148 SdVerification:
+ CardModel: Execution thread which starts initialization and
then receives token and parses them.

TbdSd:
+ Added SdWbSdSynchronization.
rkastl 4901d 22h /SdCardModel.sv
147 Sd-Core:
+ Added checking of Busy signal after write
rkastl 4901d 22h /SdCardModel.sv
145 Verification:
+ SdCardModel and SdBFM seperated
rkastl 4901d 22h /SdCardModel.sv
135 Multiple-Inclusion-Protection to SystemVerilog files added
Stops using relative paths in `includes. instead +incdir has to be used.
rkastl 4901d 22h /SdCardModel.sv
126 Read and Write works in simulation, needs verification.
Synthesis works the same like before.
rkastl 4901d 22h /SdCardModel.sv
125 Write works in simulation rkastl 4901d 22h /SdCardModel.sv

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