URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [grpSdVerification/] [unitSdVerificationTestbench/] [sim/] [modelsim.ini] - Rev 185

Rev	Log message	Author	Age	Path
185	Restructuring as source repository: Moved sources out of src subdirectory.	rkastl	4898d 17h	/sdhc-sc-core/trunk/grpSdVerification/unitSdVerificationTestbench/sim/modelsim.ini
184	Removed WbSlave shell (refs #69) Moved verification sources to grpSdVerification (fixes #70)	rkastl	4901d 11h	/modelsim.ini
176	Thesis: Conclusion Fixes #53,#61.	rkastl	4901d 11h	/modelsim.ini
158	Verification: Work on Checking Functional coverage	rkastl	4901d 11h	/modelsim.ini
136	SDHC: - SdData refactored to use a single counter - TestWbMaster added to TbdSd (not functional yet)	rkastl	4901d 11h	/modelsim.ini
123	Write: Must be able to halt SdClk, rest is done.	rkastl	4901d 12h	/modelsim.ini
122	SdController: Initial read support	rkastl	4901d 15h	/modelsim.ini
60	Receiving a response to ACMD41 works (including busy, but voltage is not checked), refs #15.	rkastl	4901d 15h	/modelsim.ini
46	Verification: Working on basic functional verification, refs #19.	rkastl	4901d 15h	/modelsim.ini