URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] [sdhc-sc-core/] [trunk/] [grpWishbone/] [pkgWishbone/] [src/] [Wishbone-p.vhdl] - Rev 185

Rev	Log message	Author	Age	Path
185	Restructuring as source repository: Moved sources out of src subdirectory.	rkastl	4893d 15h	/sdhc-sc-core/trunk/grpWishbone/pkgWishbone/src/Wishbone-p.vhdl
170	License rewritten to BSD	rkastl	4896d 09h	/Wishbone-p.vhdl
164	Headers updated (LGPL, consistent format)	rkastl	4896d 09h	/Wishbone-p.vhdl
23	Wishbone: Package split into a global and a specific one.	rkastl	4896d 13h	/Wishbone-p.vhdl
22	Wishbone: Processes for statemachine created	rkastl	4896d 13h	/Wishbone-p.vhdl
21	Wishbone: Control signals into records, unfortunately signals with a width dependend on generics can not be used in records before VHDL2008.	rkastl	4896d 13h	/Wishbone-p.vhdl
20	Wishbone: Directions added to port, support for synchronous cycle termination added to entity (and therefore new types in the package were created)	rkastl	4896d 13h	/Wishbone-p.vhdl
18	Wishbone: Slave entity started, Build file generated	rkastl	4896d 13h	/Wishbone-p.vhdl