URL https://opencores.org/ocsvn/sdram_controller/sdram_controller/trunk

Subversion Repositories sdram_controller

[/] [sdram_controller/] [trunk/] [sdram.vhd] - Rev 9

Rev	Log message	Author	Age	Path
9	Got rid of some redundant busy_n <= '0' statements	lynn0p	5357d 23h	/sdram_controller/trunk/sdram.vhd
8	Changes made to integrate and test with my homebrew SoC design. 1. One DCM has been removed. Now requires a 100mhz clock fed in. Only consumes one DCM, if you can find a 100mhz clock somewhere. 2. Small timing modifications to fix memory glitches between controller and the t80 soft cpu I'm using.	lynn0p	5357d 23h	/sdram_controller/trunk/sdram.vhd
7	Reformatted the comments so they fit in 80 columns	lynn0p	5366d 04h	/sdram_controller/trunk/sdram.vhd
6	changes to reduce synthesizer warnings, removed unused signals, etc.	lynn0p	5366d 09h	/sdram_controller/trunk/sdram.vhd
2	initial checkin	lynn0p	5367d 05h	/sdram_controller/trunk/sdram.vhd