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Rev Log message Author Age Path
48 linus 5524d 20h /
47 linus 5524d 20h /
46 linus 5524d 20h /
45 linus 5524d 20h /
44 more on directory structure markom 7619d 14h /
43 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7908d 21h /
42 This commit was manufactured by cvs2svn to create tag 'rel_12'. 7908d 21h /
41 Changed synthesizeable FPGA memory implementation.
Fixed some issues with Xilinx BlockRAM
rherveille 7908d 21h /
40 Updated PDF. lampret 7953d 00h /
39 Added Richard's feedback. lampret 7955d 01h /
38 Undeleted mohor 7975d 14h /
37 no message bbeaver 8211d 20h /
36 minor changes: unified with all common rams samg 8232d 05h /
35 corrected output: output not valid if ce low samg 8232d 10h /
34 added valid checks to behvioral model samg 8232d 11h /
33 added checks and task in behavioral section samg 8233d 12h /
32 no message bbeaver 8234d 17h /
31 no message bbeaver 8238d 18h /
30 no message bbeaver 8239d 16h /
29 got timing checks mostly correct
No functional stuff yet
bbeaver 8239d 17h /

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