OpenCores
URL https://opencores.org/ocsvn/cpu_lecture/cpu_lecture/trunk

Subversion Repositories cpu_lecture

[/] - Rev 21

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
21 fixed bug in Sign bit computation for SUB and CP instructions jsauermann 5211d 14h /
20 readability of 95xx instructions improved jsauermann 5243d 11h /
19 another bug in the decoding of two-cycle instructions fixed jsauermann 5243d 11h /
18 fixed a bug that caused double execution of some 95xx instructions jsauermann 5246d 13h /
17 fixed missing carry flag for ROR instruction jsauermann 5250d 11h /
16 fixed missing RD_M signal for IN instruction jsauermann 5259d 13h /
15 fixed SP auto inc/dec problem jsauermann 5259d 15h /
14 fixed wrong Q_RSEL for LDD instruction jsauermann 5261d 11h /
13 fixed fault in LDD/STD decoding jsauermann 5262d 11h /
12 fixed bug in decoding of I/O address for SP jsauermann 5263d 11h /
11 fixed fault is BSET/BCLR instruction jsauermann 5265d 11h /
10 wait decoder fault fixed jsauermann 5265d 17h /
9 renamed 'main' to 'hello' in build commands jsauermann 5266d 13h /
8 picture quality slightly improved jsauermann 5266d 17h /
7 support multiple port sizes in make_mem jsauermann 5266d 19h /
6 support multiple port sizes in make_mem jsauermann 5266d 19h /
5 support multiple port sizes in make_mem jsauermann 5266d 19h /
4 initial check-in jsauermann 5270d 15h /
3 initial check-in jsauermann 5270d 20h /
2 initial check-in jsauermann 5271d 13h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.