URL https://opencores.org/ocsvn/mem_ctrl/mem_ctrl/trunk

Subversion Repositories mem_ctrl

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Rev	Log message	Author	Age	Path
27	Initial release	rherveille	8124d 15h	/
26	Initial release	rherveille	8124d 15h	/
25	Initial release	rherveille	8124d 15h	/
24	* empty log message *	rudi	8168d 17h	/
23	* empty log message *	rudi	8168d 17h	/
22	Fixed several minor bugs, cleaned up the code further ...	rudi	8168d 17h	/
21	Updated Spec ...	rudi	8175d 05h	/
20	- Fixed combinatorial loops in synthesis - Fixed byte select bug	rudi	8200d 01h	/
19	* empty log message *	rudi	8209d 00h	/
18	- Made some changes not to expect clock during reset ...	rudi	8210d 04h	/
17	- Updated Documentation - More Synthesis cleanup, mostly for speed - Several bug fixes - Changed code to avoid auto-precharge and burst-terminate combinations (apparently illegal ?) Now we will do a manual precharge ...	rudi	8222d 04h	/
16	- More Synthesis cleanup, mostly for speed - Several bug fixes - Changed code to avoid auto-precharge and burst-terminate combinations (apparently illegal ?) Now we will do a manual precharge ...	rudi	8222d 04h	/
15	Just minor test bench update, syncing all the files.	rudi	8238d 06h	/
14	Minor fixes to testbench ...	rudi	8240d 05h	/
13	Fixed Register reads Tightened up timing for register rd/wr	rudi	8278d 03h	/
12	Changed Reset to be active high and async.	rudi	8288d 06h	/
11	* empty log message *	rudi	8301d 17h	/
10	Fixed the TMS register setup to be tight and correct.	rudi	8310d 04h	/
9	Many fixes for minor bugs that showed up in gate level simulations.	rudi	8310d 04h	/
8	- Changed IO names to be more clear. - Uniquifyed define names to be core specific. - Removed "Refresh Early" configuration	rudi	8332d 22h	/

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Subversion Repositories mem_ctrl

[/] - Rev 27

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