OpenCores
URL https://opencores.org/ocsvn/next186_soc_pc/next186_soc_pc/trunk

Subversion Repositories next186_soc_pc

[/] - Rev 9

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
9 ndumitrache 2672d 11h /
8 Lattice Mach XO2 + SDRAM port (FleaFPGA) ndumitrache 3677d 13h /
7 Disable interrupts in VESAMemControl callback ndumitrache 3801d 12h /
6 ndumitrache 3980d 18h /
5 updated Next186 CPU ndumitrache 3980d 18h /
4 fix BIOS int 1ah (Get system time) ndumitrache 4011d 18h /
3 ndumitrache 4014d 20h /
2 ndumitrache 4014d 20h /
1 The project and the structure was created root 4015d 13h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.