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Rev Log message Author Age Path
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.		 jshamlet 388d 12h /
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 388d 13h /
314 Code cleanup and added comments jshamlet 388d 14h /
313 Added all generics to package component jshamlet 388d 15h /
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation		 jshamlet 388d 15h /
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 432d 12h /
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 459d 17h /
309 Comment cleanup jshamlet 470d 01h /
308 jshamlet 481d 07h /
307 Fixed comments on o8_version.vhd jshamlet 688d 17h /
306 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK jshamlet 692d 18h /
305 More code cleanup - rearranged macros and moved stack init to separate macro jshamlet 692d 19h /
304 Modified TASK_SETUP to use the same macros as the rest of the task switcher and cleaned up the code some more. jshamlet 692d 19h /
303 Fixed working, but "incorrect" code (constants were right, but were named incorrectly jshamlet 693d 06h /
302 Corrected issue where register state wasn't being preserved for user function stubs,
Modified FREEMEM calc to use the region size constant.		 jshamlet 693d 07h /
301 Adding actual task manager files jshamlet 695d 04h /
300 Adding core task manager assembly jshamlet 695d 04h /
299 Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling" jshamlet 697d 05h /
298 Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions. jshamlet 698d 07h /
297 Fixed register map comments jshamlet 988d 15h /

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