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Rev Log message Author Age Path
23 added logic for CRC-Generation dkoethe 5925d 02h /
22 added signal opb_m_last_block for CRC dkoethe 5925d 02h /
21 added constant C_ADR_RX_CRC,C_ADR_TX_CRC,
added constant C_OPB_CTL_REG_CRC_EN, C_OPB_CTL_REG_CRC_CLR		 dkoethe 5925d 02h /
20 Initial Release dkoethe 5925d 02h /
19 Version 1.2 removed delays for simulation dkoethe 6030d 00h /
18 Version 1.1
Bugfix
added syncronisation registers opb_fifo_flg_int_r[0,1] to prevent metastability		 dkoethe 6030d 00h /
17 no message dkoethe 6036d 22h /
16 no message dkoethe 6037d 01h /
15 increased C_NUM_FLG to 16, C_NUM_INT to 11 for opb_abort_flg dkoethe 6037d 01h /
14 - Added opb_abort_flg to component an Instance opb_m_if
- opb_irq_flg(10) <= opb_abort_flg;
- opb_fifo_flg(15 <= opb_fifo_flg;		 dkoethe 6037d 01h /
13 Added opb_abort_flg to indicate a transfer failure dkoethe 6037d 01h /
12 Initial Release dkoethe 6040d 01h /
11 Changed Width of TX_DMA_NUM/RX_DMA_NUM from 16 to 24Bit to increase
maximal DMA-Transfer Size from 1 MByte to 256MByte		 dkoethe 6041d 23h /
10 Changed opb_tx_dma_num, opb_rx_dma_num from fixed width of 16 to constant
C_WIDTH_DMA_NUM in opb_spi_slave_pack.vhd. Default Value: 24		 dkoethe 6041d 23h /
9 Initial Release vhdldoc-Documentation dkoethe 6047d 22h /
8 no message dkoethe 6047d 22h /
7 2007-11-22
added DMA-Registers and Register Description
removed Signal and Generic-Table for vhdl units. See vhdldoc HTML Documentation.		 dkoethe 6047d 22h /
6 no message dkoethe 6047d 22h /
5 Bugfix:
added Parameter "MIN_SIZE = 0x80 " to C_BASEADDR to enable automatic adress generation by EDK.		 dkoethe 6049d 01h /
4 -- Bugfix
-- IRQ-Flag RX_Overflow shows prog_empty insteed rx_overflow

-- opb_irq_flg(5) <= opb_fifo_flg(9); to opb_irq_flg(5) <= opb_fifo_flg(8);		 dkoethe 6049d 01h /

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