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Rev Log message Author Age Path
36 Added component declaration jesus 7897d 06h /
35 Release 0242 jesus 7903d 18h /
34 Updated for ISE 5.1 jesus 7903d 23h /
33 Fixed typo jesus 7913d 15h /
32 Fixed for ISE 5.1 jesus 7913d 15h /
31 Fixed generic name error jesus 7916d 17h /
30 Changed to xilinx specific RAM jesus 7922d 17h /
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7922d 17h /
28 Adapted for zxgate jesus 7923d 17h /
27 Xilinx SSRAM, initial release jesus 7923d 17h /
26 Fixed instruction timing for POP and DJNZ jesus 7937d 09h /
25 IX/IY timing and ADC/SBC fix jesus 7938d 19h /
24 no message jesus 7944d 15h /
23 Fixed T2Write jesus 7944d 16h /
22 Added 8080 top level jesus 7944d 16h /
21 no message jesus 7949d 15h /
20 Updated for new T80s generic jesus 7949d 15h /
19 Initial version jesus 7949d 15h /
18 Added T2Write generic jesus 7949d 21h /
17 Removed write through jesus 7951d 14h /

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