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Rev Log message Author Age Path
41 Removed UNISIM library jesus 7868d 18h /
40 Cleanup jesus 7868d 18h /
39 Added -n option and component declaration jesus 7896d 15h /
38 Added Leonardo .ucf generation jesus 7896d 15h /
37 Changed to single register file jesus 7896d 18h /
36 Added component declaration jesus 7896d 18h /
35 Release 0242 jesus 7903d 06h /
34 Updated for ISE 5.1 jesus 7903d 12h /
33 Fixed typo jesus 7913d 03h /
32 Fixed for ISE 5.1 jesus 7913d 03h /
31 Fixed generic name error jesus 7916d 05h /
30 Changed to xilinx specific RAM jesus 7922d 05h /
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7922d 05h /
28 Adapted for zxgate jesus 7923d 05h /
27 Xilinx SSRAM, initial release jesus 7923d 05h /
26 Fixed instruction timing for POP and DJNZ jesus 7936d 21h /
25 IX/IY timing and ADC/SBC fix jesus 7938d 07h /
24 no message jesus 7944d 04h /
23 Fixed T2Write jesus 7944d 04h /
22 Added 8080 top level jesus 7944d 04h /

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