OpenCores
URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

[/] - Rev 106

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Rev Log message Author Age Path
106 update core netlist ultro 2874d 13h /
105 migration nexys ddr ultro 2874d 14h /
104 iadd rstgen and clk wiard for ddr nexys4 TOP ultro 2881d 14h /
103 commit top for 128mbyte nexys4 ddr version ultro 2891d 04h /
102 committed 128mbytes boot code for nexys4 ddr ultro 2891d 04h /
101 add ddr interface mig7 xilinx xci ip ultro 2891d 17h /
100 add crossbar for nexys4 ddr with 128megabyte ram window ultro 2891d 17h /
99 remove phy_intn from xdc constraints as it is not used inside design wi th etherlite. ultro 2933d 02h /
98 update tbench and add mii to rmii converter ip from xilinx ultro 2933d 12h /
97 update periph and TOP ultro 2933d 12h /
96 update periph , uart is not inside ultro 2933d 12h /
95 update boot.mem accordingly to test.s cleanup ultro 2935d 15h /
94 clean up test.s ultro 2935d 15h /
93 added stub for keyboard ultro 2936d 04h /
92 added doc ultro 2936d 05h /
91 update netlists cosmetics ultro 2936d 17h /
90 updated cosmetic periph.v ultro 2936d 18h /
89 add 3x rtl files ultro 2936d 20h /
88 remove axi ip standalone ultro 2936d 20h /
87 update rtl for boot.mem ultro 2936d 20h /

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