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URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

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Rev Log message Author Age Path
110 updated MCS files to be downloaded to nexys4 DDR ultro 2867d 19h /
109 update for nexys 4 ddr ultro 2867d 19h /
108 update xdc for nexys 4 ddr ultro 2867d 19h /
107 crossbar update ultro 2867d 19h /
106 update core netlist ultro 2867d 19h /
105 migration nexys ddr ultro 2867d 21h /
104 iadd rstgen and clk wiard for ddr nexys4 TOP ultro 2874d 21h /
103 commit top for 128mbyte nexys4 ddr version ultro 2884d 10h /
102 committed 128mbytes boot code for nexys4 ddr ultro 2884d 10h /
101 add ddr interface mig7 xilinx xci ip ultro 2885d 00h /
100 add crossbar for nexys4 ddr with 128megabyte ram window ultro 2885d 00h /
99 remove phy_intn from xdc constraints as it is not used inside design wi th etherlite. ultro 2926d 09h /
98 update tbench and add mii to rmii converter ip from xilinx ultro 2926d 18h /
97 update periph and TOP ultro 2926d 19h /
96 update periph , uart is not inside ultro 2926d 19h /
95 update boot.mem accordingly to test.s cleanup ultro 2928d 22h /
94 clean up test.s ultro 2928d 22h /
93 added stub for keyboard ultro 2929d 11h /
92 added doc ultro 2929d 12h /
91 update netlists cosmetics ultro 2930d 00h /

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